5. FEASTMP DC/DC

The VLDB+ cannot run without DC/DCs. The DC/DC connectors are provided with the VLDB+ and are located in the upper left side of the VLDB+. The silkscreen describes where to plug each DC/DC. It is necessary to plug the FEASTMP1V2 and the FEASTMP2V5 on their respective connectors before powering on the VLDB+. The FEASTMP1V2 is mainly used to run the lpGBT at 1V2 and the FEASTMP2V5 is mainly used to run the VTRX+ at 2.5 V. For more information, refer to Section 13.14.

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Fig. 5.1 Two VLDB+ DC/DC

Note

The minimum input power both FEASTMPs housed on the VLDB+ need to be turned on is 9.5V. A zener diode (D1) regulates the DC/DC enable so they are disable when VIN_VLDB+ < 9.5V.

Note

In case of using other type of DC/DC converters (as the bPol Mezzanine), it is required to change the resistor value of R20 to 6kΩ to provide an Enable voltage when powered of at least 800 mV. With the FEASTMPs this can be achieved with the default value of R20 that is 100kΩ.

Note

The R47 resistor is populated so you can Disable and Enable both FEASTMP through the FEASTMP button on the PiGBT web interface when the RPI Translator Board is connected to the J13 connector.

Warning

Both FEASTMP connectors are identical. Take care, do not plug and power on the VLDB+ with any FEASTMP in the wrong connector.